Single Clock Cycle Circuit
One of the requirements of the 6502 project requires that I have the ability to send the processor single clock pulses. The reason for this is to allow me to take a look at the address and data buses at a given time. For the most part, this will only be helpful during the initial phase of the project to see if the processor is behaving as it should. Further in the project it becomes less useful as you would have to send so many clock pulses you would wear your finger off your hand trying to send them. For that, we will use the crystal oscillator clock circuit.
There are a few things that we have to keep in mind when deciding on a circuit to use to send the manual clock cycles.
- Switches are prone to bouncing, so the input of the circuit needs to be conditioned so that when (not if) the contacts bounce it is not picked up as multiple pulses or inputs.
- The newer 65C02 processor can hold its information as long as the clock signal remains in a high state. The 6502 processor from Western Design Center does not care if the clock is held in either a low or high state. It will not lose information. If you have one of the original NMOS 6502 processors, then you cannot send single clock cycles to the processor without it losing information. That processor requires a minimum frequency clock cycle in order to hold information in its registers.
- Finally, we only need a short pulse to the processor to do its job, so the output of the circuit should control the pulse width.
The circuit that I have selected for this task is from Garth Wilson at wilsonmineco.com. Garth has loads of information on using the 6502 and is worth your time end energy to visit and read through. I cannot recommend his site high enough. It is a must read! I have no desire to reinvent the wheel and Garth was kind enough to allow me to post his circuit here. What follows is a schematic of the circuit and how it works.
You can get a slightly larger version of this circuit by clicking on it. Let's see how this circuit works.
Looking at the schematic above you see there are two Schmitt triggered Inverters. This particular inverter provide two functions. 1) As its name implies it inverts the signal on its input to the opposite on its output. For example, if the input of the inverter is logic level 1, the the output will be a logic level 0 and vise versa. 2) A normal CMOS chip recognizes a low logic level from 0V to 0.1.5V and a high logic level from 3.5V to Vdd. If for some reason the voltage applied to the input rest between 1.5V and 3.5V then the logic gate is in an unpredictable state. These condition can wreak havoc on the circuit because we just don't know what the output will be. To help remedy this problem the Schmitt trigger was developed. In order for Schmitt Trigger to change state, a certain level of voltage has to be exceeded. In effect, this allows the input to drift into the 1.5 to 3.5V zone and not change the output. The circuit above uses a 74HC14 a High Speed CMOS Schmitt trigger hex inverter. The data sheet for this chip can be found on Jameco's website as well as other places on the Internet. A google search will find it for you quickly. Looking at the data sheet, we see that for a low level to transition to a high logic level requires the input voltage to rise above 3.15V to change. And to move from a high logic level to a low level require the input voltage to drop below 2.2V. This in effect eliminates the unknown conditions that could show up if the input voltage strays between the accepted low and high levels. For a more detailed explanation of Schmitt triggers I encourage you to read the wiki page at pcbheaven.com.
A switch is designed connect circuits together, transfer signals and related tasks. All switches suffer from a common malady. The contacts tend to bounce when they are activated (switched). This bouncing action depends on the switch at hand and can last for a few microseconds to as long as a few milliseconds. The problem with this condition in digital circuits is that the receiving gate can detect the bounces and misinterpret them as a signal or logic changes. So, for example, if we had a counter circuit and wanted to count the button presses from a user, instead of reading one press, the counter may see as many as dozens of presses because of the bouncing contacts in the switch. Looking to the left end of the schematic, you will see an interpretation of a signal of a switch while it bounces. In digital electronics, the solution to this problem is called switch debouncing.
Debouncing the Input
To debounce the switch we use a combination of an RC circuit and the switching characteristics of the Schmitt trigger to remove the unwanted pulses from the out put. Here we are looking at R1, R2 and C1. When the circuit is first powered up the positive end of C1 has 0V. We know from basic electronics that R1 and R2 in series with the capacitor will take some time to charge. This time cycle is called an RC Time constant and it takes 5 of these constants for the capacitor to fully charge. Also we know that for each time cycle the capacitor will charge about 63% from its current voltage to the applied voltage. (Now those paying attention realize that after the 5 time cycle that the capacitor cannot be fully charged, but in practice we say it is.) The time for our capacitor charge can be calculated by (R1+R2)(C1) = (10K + 47K)(1uF) = 57ms (milliseconds). During this first 53ms, the capacitor will charge to 3.15V crossing the threshold of the Schmitt trigger causing the output at pin 2 to go low. After 5 time constants the capacitor will be at Vcc. (5)(57ms) = 285ms (just over a quarter of a second). The debounce or removal of the contact bouncing happens because the switch will settle down before the capacitor reaches a charge level high enough to change the state of the inverter. How long is required? Well that depends on the characteristic of the switch being used, but if you give 25ms for the switch to settle down when it changes states then you will effectively remove the added pulses the bouncing switch will create while waiting for the capacitor to charge.
Now looking at the circuit from the other direction, if we press the button we give the capacitor a path to ground allowing it to discharge. But this time, R1 is effectively removed from the RC circuit so our time constant changes just a little bit. Our new constant becomes R2 X C1 = (47K)(1uF) = 47ms (milliseconds), which gives the switch time to settle down. During this first time cycle the capacitor will discharge 63% of its voltage dropping the input voltage on pin 1 from Vcc (5V) to 1.85V, crossing the low threshold of the Schmitt trigger setting the output on pin 2 to a high. R1 sits between the Vcc and the switch to ground. Its job here is a current limiter because we are shorting Vcc to ground.
Look at the Switch Signal and the Debounce Signal graphs to see the effect that this debouncing portion of the circuit has on the input and output.
Setting the Width of the Pulse
Now that we have covered the debouncing of the signal from the switch we can turn our attention to the middle part of the circuit between the two inverters. When the output of the first inverter is low, because we have not pushed the button, there is no charge on capacitor C2. This is seen on the inverter as a low on pin 3 and the output on pin 4 is high. But here is where things get interesting. When the button is pushed and the output of the first inverter goes high, the capacitor appears to be a short allowing current to flow through it through R3. While doing so, the input to pin 3 of the second inverter goes high causing the output at pin 4 to go low. The time constant for C2 to charge is C2 x R3 = (100pF)(10K) = 1us (microsecond). During the first time constant C2 would have charged to 3.15V leaving 1.85V at the junction of C3 and R2, during the second time cycle the capacitor will have charged to approximately 4.3 volts during the second time cycle the voltage at the junction of C2 and R3 would have crossed the low threshold of the Schmitt trigger causing a high on pin 4, the output. The time that it takes to charge the capacitor to drop the voltage to switch the state of the inverter will then determine the pulse width on the output. In this case between 1 and 2us.
When the button is released, the output of the first inverter drops low. Now we have a charge in the capacitor and it needs to discharge. The end closest to the inverter (pin 2) will have an abundance positive charge, because the gate has switched low, the positive side of the capacitor will equalize through the gate. The other side of the capacitor however will have a negative charge from the electrons collecting on the plate. When these head back to ground, we get a reverse current. The Diode (D1) and Resister (R4) are there to protect the input if the second inverter from dropping too far below ground and destroying it. The diode prevents the input from dropping any further than the forward bias voltage of the diode (about .6V or so). The Resistor serves to protect against the amount of reverse current that will be drawn through the input of the inverter. Now the input of the inverter does have a protection diode and it will drop about .25V of the .6V going across our signal diode. So calculating the current going through the input of the inverter is (.6V - .25V) / 1K = 350uA (microAmps)
The Schmitt trigger inverters can be used as a debounced, predetermined pulse width strobe for use with the 6502 processor as long as we observe the following:
- Select components for the input that will cover the amount of time that it takes the switch to settle down (about 25ms).
- Select the RC values you need to give the time length of the pulse you are looking for.
- Make sure you protect the output inverter from the reverse current when the RC circuit decays to keep from burning the part out.
Many thanks goes to Garth Wilson for helping me understand the second stage of this circuit. Without whom, I would probably still be scratching my head. Again, I encourage you to check out Garth's site. He has LOADS of stuff on the 6502 processor.